1. Technical Field
The disclosed embodiments relate to frequency dividers.
2. Background Information
FIG. 1 (Prior Art) is a diagram of one example of a local oscillator 1. Radio receivers and radio transmitters, such as are found in cellular telephones, often involve multiple such local oscillators. A local oscillator of this type generally involves a reference clock source 2, a phase-locked loop 3, and a frequency divider 4. In the illustrated example, a phase detector 5 receives a reference clock signal REF from reference clock source 2 and also receives a feedback signal from a frequency divider 6. Phase detector 5 outputs a phase error signal that is supplied to a charge pump 7. The output of charge pump 7 is filtered by a loop filter 8 to generate a voltage level signal. The voltage level signal is supplied onto the control input lead of a voltage controlled oscillator (VCO) 9. The voltage on the control input lead of VCO 9 determines the frequency of the signal VCO_OUT output by VCO 9. Frequency divider 6 frequency divides VCO_OUT and supplies the resulting frequency-divided signal to phase detector 5 as the feedback signal. When the phase-locked loop is locked, the feedback signal and the signal REF are in phase, and the frequency of VCO_OUT is determined by the divisor number by which frequency divider 6 divides. The frequency of VCO_OUT is the product of the divisor number and the frequency of the reference clock REF. The VCO_OUT signal is typically not output as the local oscillator output signal (LO), but rather the VCO_OUT signal is frequency divided to a lower frequency by a second frequency divider 4. Frequency divider 4 may, for example, be set to frequency divide by a relatively small integer number such as two, or four, or eight.
In the case of integrated transceiver integrated circuits within cellular telephones, it is often desired to make the transceiver integrated circuit such that the same integrated circuit design can be used to communicate in any one of multiple different frequency bands. FIG. 2 (Prior Art) sets forth examples of various frequency bands over which a single receiver (within a transceiver integrated circuit of a cellular telephone) might be required to communicate. The rightmost two columns of FIG. 2 indicate the output frequencies of the needed local oscillator (LO) signals to be generated. The column designated “LO DIVIDER” indicates the number by which the frequency divider 4 divides. The two columns designated “VCO OUTPUT MIN” and VCO OUTPUT MAX” set forth the corresponding VCO output frequencies need to generate the desired LO MIN and LO MAX frequencies, given the specified divisor in the LO DIVIDER column. To generate the required local oscillator output signal of the desired frequencies, note that the VCO output frequency must be able to range from 2950 megahertz to 5380 megahertz. This is a relatively wide VCO tuning range. It may be difficult to realize a VCO with a wide tuning range, or it may be for other reasons undesirable to have to provide such a wide VCO tuning range.
If frequency divisor 4 could be set to divide by three, then it might be possible to reduce the VCO tuning range. Although frequency dividers that frequency divide by three are known, such frequency dividers are generally not usable because the local oscillator output signal desired is often actually not just one signal (LO), but rather is a pair of signals, where the phase of one of the signal is ninety degrees out of phase with respect to the other of the signals. Such LO signals are referred to as quadrature signals, or the local oscillator signal are said to be “in quadrature”. The letters I and Q are often used to designate such quadrature signals. Quadrature signals may, for example, be required by other receiver circuitry to perform phase shift keying modulation and/or to perform image canceling.
FIG. 3 (Prior Art) is an example of a prior art divide-by-three frequency divider 10 set forth in 1973 in the article entitled “Low Power Consumption And High Frequency”, Electronics Letters, Issue 17, vol. 9, Aug. 23, 1973, by H. Oguey and C. Vittoz. FIG. 4 (Prior Art) is a waveform diagram that illustrates operation of the circuit. When an input clock signal CLK of frequency 3F is supplied onto input lead 11, the circuit generates three signals A, B and C on nodes 12, 13 and 14, respectively, of frequency F. No two of the signals A, B and C are ninety degrees out of phase with respect to each other, so such a frequency divider is not used for frequency divider 4 in the local oscillator 1 of FIG. 1 if quadrature local oscillator output signals are to be generated.